职位描述
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岗位职责:1.Develop advanced standard cell and GPIO libraries on advanced process technologies (6nm, 7nm, 12/16nm, 22/28nm, etc.)2.Take challenging tasks from circuit design to SOC design to achieve world-class PPA performance (high-performance, low-power, and area-effective)任职要求:1.Good knowledge of circuits design. Experience in digital circuit or analog design is preferred. 2.Experience in Cadence/Synopsys/Mentor EDA tools and Linux/Unix environment is preferred3.CAD and script capability such as Python/Perl/Shell is preferred.4.Solid understanding of device scaling challenges and circuit-process technology interactions applicable for advanced FinFET nodes is a plus.5.Experience in reliability (EM, high-temperature aging effects, etc.) is a plus6.Self-motivated and hard work.
职能类别:硬件工程师
工作地点
地址:南京南京
![](http://img.jrzp.com/jrzpfile/rcw/SearchJob/images/jg.png)
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职位发布者
马荣HR
台积电(南京)有限公司
![](http://img.jrzp.com/jrzpfile/provincercw/images/sfrz_yrz.png)
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电子技术·半导体·集成电路
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200-499人
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外商独资·外企办事处
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浦口经济开发区紫峰路16号